The present invention relates generally to digital graphic display processors, and more particularly, to a symbol and text graphics signal generator which provides multiple hardware based symbol and text generating capability.
Real time digital electronic displays are used in many applications such as military command and control workstations and air-traffic control systems. In these displays, the displayed information typically comprises real-time processed data generated by a host processor adapted to receive real-time information from one or more radars, communications systems and/or other data processors. These data are combined with one or more graphic primitives, such as a circle, ellipse or polygon, along with generated alphanumerics, mask areas and texture patterns to provide a relatively easily understood comprehensive graphic display on a graphics output device such as cathode-ray tube. In contemporary systems, the various components of the graphics display such as the graphic primitives, mask windows, fill texturing and the like are provided either by a general purpose computer based graphics generator or by a hardware specific graphics generator. Of these, general purpose graphics generators offer system versatility but usually must sacrifice some degree of system performance for ease of programming. On the other hand, hardware specific graphics generators, called cogenerators, provide good system performance.
Increasing demands on military command and control systems, military and civil air-traffic control systems arid the like have created a need for a high performance multifunction graphics rendering processor which provides a versatile hardware based symbol and text generating processor. It is therefore an objective of the invention to provide a multifunction graphics rendering processor that is a high performance two dimensional graphics engine which includes a hardware based modular solution to a wide variety of symbol and text graphic system applications. The multifunction graphics rendering processor is implemented as an integrated circuit chip using large scale integration logic. Another objective of the invention is to provide a symbol and text generating processor that generates both stroke coded and dot matrix symbols and text in a wide variety of fonts. Still another objective is to provide a symbol and text generating processor that is easily programmed and which provides a user friendly typewriter operating mode, automatic: underlining and which can render symbol and text in multiple directions.